Orthogone’s licensable FPGA portfolio combines Ethernet MAC/PCS at 1G, 10G, 25G, 40G and 100G, hardware TCP/IP and UDP/IP offload, and PCIe Gen3/Gen4 circular-buffer DMA. Optional Reed-Solomon FEC is listed at selected Ethernet rates. The integrated kit supplies encrypted RTL, AMD Alveo reference designs, simulation testbenches, Linux drivers and documentation. The portfolio is offered for evaluation and licensing on AMD UltraScale+ and Versal platforms; a chosen board, protocol configuration and host software environment still define the integration scope.
Technical detail
Core features
1G to 100G Ethernet MAC/PCS with optional FEC at selected rates
Hardware Layer 2–4 TCP/IP and UDP/IP offload
Bidirectional PCIe Gen3/Gen4 circular-buffer DMA
Encrypted RTL, reference designs, simulation and Linux drivers
FPGA IP
Ethernet MAC/PCS
TCP/IP offload
PCIe DMA
Use & integration
Recorded applications
Deterministic sensor and communications data paths
FPGA-to-host packet and data movement
Embedded networking and high-performance computing integration
These describe the reviewed application scope, not confirmed deployments, released requirements or procurement eligibility.
Evidence of maturity
Orthogone says the IP originated in production FinTech use and reports unnamed adopters in other industries. These supplier statements do not establish a particular defence-system acceptance or end-to-end mission-performance result.
Commercial availability
Available for evaluation and licensing on AMD UltraScale+ and Versal platforms. Project, site, corporate, annualized and card-based terms are offered; confirm the exact board, IP blocks and driver/reference-design deliverables.
Integration and verification
Readiness
A technology readiness level is not established by the reviewed public sources.
Reviewed connections
No reviewed Mission area or released Defence need connection is currently published.
Original sources 1 linked record
These records support this capability and its published Mission area and Defence need connections. A source count is not a count of independent confirmations.
Orthogone combines hardware Layer 2–4 TCP/IP and UDP/IP offload with bidirectional PCIe Gen3/Gen4 circular-buffer DMA for FPGA-to-host data movement.
Supports: Capability · commercial availability
Orthogone announced on October 1, 2026 that its ULL FPGA IP Portfolio is available for evaluation and licensing on AMD UltraScale+ and Versal adaptive platforms.
Supports: Capability · maturity
Orthogone announced on October 1, 2026 that its ULL FPGA IP Portfolio is available for evaluation and licensing on AMD UltraScale+ and Versal adaptive platforms.
Supports: Capability · summary
Orthogone announced on October 1, 2026 that its ULL FPGA IP Portfolio is available for evaluation and licensing on AMD UltraScale+ and Versal adaptive platforms.
Supports: Capability · summary
The portfolio kit includes encrypted RTL, AMD Alveo reference designs, simulation testbenches, Linux drivers and product documentation, with project, site, corporate, annual and card licensing options.
Supports: Capability · name
Orthogone announced on October 1, 2026 that its ULL FPGA IP Portfolio is available for evaluation and licensing on AMD UltraScale+ and Versal adaptive platforms.
Supports: Capability · technical tags
Orthogone announced on October 1, 2026 that its ULL FPGA IP Portfolio is available for evaluation and licensing on AMD UltraScale+ and Versal adaptive platforms.
Supports: Capability · commercial availability
The portfolio kit includes encrypted RTL, AMD Alveo reference designs, simulation testbenches, Linux drivers and product documentation, with project, site, corporate, annual and card licensing options.
Supports: Capability · core features
The new portfolio lists IEEE 802.3 Ethernet MAC/PCS at 1G, 10G, 25G, 40G and 100G, with optional Reed-Solomon FEC at 25G and 100G.
Supports: Capability · capability type
Orthogone announced on October 1, 2026 that its ULL FPGA IP Portfolio is available for evaluation and licensing on AMD UltraScale+ and Versal adaptive platforms.
Supports: Capability · technology readiness level
Orthogone announced on October 1, 2026 that its ULL FPGA IP Portfolio is available for evaluation and licensing on AMD UltraScale+ and Versal adaptive platforms.
Supports: Capability · core features
Orthogone announced on October 1, 2026 that its ULL FPGA IP Portfolio is available for evaluation and licensing on AMD UltraScale+ and Versal adaptive platforms.
Supports: Capability · technicaldomainslugs
Orthogone announced on October 1, 2026 that its ULL FPGA IP Portfolio is available for evaluation and licensing on AMD UltraScale+ and Versal adaptive platforms.
Supports: Capability · technical tags
Orthogone announced on October 1, 2026 that its ULL FPGA IP Portfolio is available for evaluation and licensing on AMD UltraScale+ and Versal adaptive platforms.
Supports: Capability · technical tags
Orthogone announced on October 1, 2026 that its ULL FPGA IP Portfolio is available for evaluation and licensing on AMD UltraScale+ and Versal adaptive platforms.
Supports: Capability · core features
The portfolio kit includes encrypted RTL, AMD Alveo reference designs, simulation testbenches, Linux drivers and product documentation, with project, site, corporate, annual and card licensing options.
Supports: Capability · summary
The new portfolio lists IEEE 802.3 Ethernet MAC/PCS at 1G, 10G, 25G, 40G and 100G, with optional Reed-Solomon FEC at 25G and 100G.
Supports: Capability · core features
Orthogone announced on October 1, 2026 that its ULL FPGA IP Portfolio is available for evaluation and licensing on AMD UltraScale+ and Versal adaptive platforms.
Supports: Capability · technicaldomainslugs
Orthogone announced on October 1, 2026 that its ULL FPGA IP Portfolio is available for evaluation and licensing on AMD UltraScale+ and Versal adaptive platforms.
Supports: Capability · core features
Orthogone combines hardware Layer 2–4 TCP/IP and UDP/IP offload with bidirectional PCIe Gen3/Gen4 circular-buffer DMA for FPGA-to-host data movement.
Supports: Capability · maturity
Orthogone says the IP originated in production FinTech applications and reports unnamed early adopters beyond FinTech, including aerospace, defence and quantum computing. No named mission-system acceptance is disclosed.
Supports: Capability · defence applications
Orthogone announced on October 1, 2026 that its ULL FPGA IP Portfolio is available for evaluation and licensing on AMD UltraScale+ and Versal adaptive platforms.
Supports: Capability · defence applications
Orthogone announced on October 1, 2026 that its ULL FPGA IP Portfolio is available for evaluation and licensing on AMD UltraScale+ and Versal adaptive platforms.
Supports: Capability · core features
Orthogone announced on October 1, 2026 that its ULL FPGA IP Portfolio is available for evaluation and licensing on AMD UltraScale+ and Versal adaptive platforms.
Supports: Capability · defence applications
Orthogone announced on October 1, 2026 that its ULL FPGA IP Portfolio is available for evaluation and licensing on AMD UltraScale+ and Versal adaptive platforms.
Supports: Capability · core features
Orthogone combines hardware Layer 2–4 TCP/IP and UDP/IP offload with bidirectional PCIe Gen3/Gen4 circular-buffer DMA for FPGA-to-host data movement.
Supports: Capability · slug
Orthogone announced on October 1, 2026 that its ULL FPGA IP Portfolio is available for evaluation and licensing on AMD UltraScale+ and Versal adaptive platforms.
Supports: Capability · core features
Orthogone announced on October 1, 2026 that its ULL FPGA IP Portfolio is available for evaluation and licensing on AMD UltraScale+ and Versal adaptive platforms.
Supports: Capability · technical tags
Orthogone announced on October 1, 2026 that its ULL FPGA IP Portfolio is available for evaluation and licensing on AMD UltraScale+ and Versal adaptive platforms.
Public sources cited · Facts and assessments kept separate · Human review
